74HC174DB,112
Flip Flop, 74HC174, D, 28 ns, 107 MHz, 5.2 mA, 16 Pins, SSOP
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Manufacturer:Nexperia
Product Category:
Logic ICs, Flip Flops
Avnet Manufacturer Part #: 74HC174DB,112
Secondary Manufacturer Part#: 74HC174DB,112
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RoHS 10 Compliant -
Tariff Charges
The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT174 have six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one set-up time prior to the LOW-to-HIGH clock transition, is transferred to the corresponding output of the flip-flop.
- Six edge-triggered D-type flip-flops
- Asynchronous master reset
- Output capability: standard
- ICC category: MSI
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| HC | ||
| D-Type Bus Interface | ||
| 260 | ||
| -5.2 mA | ||
| 165@2V|33@4.5V|28@6V ns | ||
| 0.008 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 6 | ||
| 6 | ||
| 6 | ||
| 1 | ||
| 0 | ||
| -40 to 125 °C | ||
| Single-Ended | ||
| 16SSOP | ||
| 16 | ||
| Non-Inverting | ||
| 6.4 x 5.4 x 1.8 mm | ||
| 50 pF | ||
| No | ||
| Master Reset | ||
| SSOP | ||
| Positive-Edge | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542330001 |
| Schedule B: | 8542330000 |
Factory Lead Time: