74HC157D,653
Multiplexer, 74HC, 4 Channel, 2:1, 2 V to 6 V, 16 Pins, SOIC
- RoHS 10 Compliant
- Tariff Charges
The 74HC157-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC157-Q100 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74HC157-Q100. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator. The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. The 74HC157-Q100 is logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S.
- Low power dissipation
- Non-inverting data path
- CMOS Input level
- Complies with JEDEC standard No. 7A
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 4 x 2:1 | ||
| Gold | ||
| HC | ||
| Multiplexer | ||
| 260 | ||
| -5.2 mA | ||
| 5.2 mA | ||
| 6 V | ||
| 125@2V|25@4.5V|21@6V ns | ||
| 2 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 8 | ||
| -40 to 125 °C | ||
| 16SO | ||
| 16 | ||
| 10 x 4 x 1.45 mm | ||
| No | ||
| SOIC |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |