74HC132D-Q100,118
NAND Schmitt Trigger, Quad, 2 Input, 14 Pins, SOIC, 74HC132
- RoHS 10 Compliant
- Tariff Charges
The 74HC132-Q100; 74HCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A The 74HC132-Q100; 74HCT132-Q100 is a quad 2-input NAND gate with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ?)
- Multiple package options
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Schmitt Trigger | ||
| NAND | ||
| 125@2V|25@4.5V|21@6V ns | ||
| 2 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 0 | ||
| -40 to 125 °C | ||
| 14SO | ||
| 14 | ||
| 8.75 x 4 x 1.45 mm | ||
| No | ||
| SOIC |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |