74CBTLV3125PW,118

74CBTLV3125PW,118 is a 4bit bus switch. It provides a 4bit high-speed bus switch with separate output-enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is HIGH. To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver. Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3V to 3.6V. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

• Supply voltage range from 2.3V to 3.6V, high noise immunity
• 5 ohm switch connection between two ports, rail to rail switching on data I/O ports
• Latch-up performance exceeds 250mA per JESD78B Class I level A
• IOFF circuitry provides partial Power-down mode operation, CMOS low power consumption
• Input leakage current is ±20µA max at (pin nOE; VI = GND to VCC; VCC = 3.6V)
• Supply current is 50µA max at (VI = GND or VCC; IO = 0A; VSW = GND or VCC; VCC = 3.6V)
• ON resistance is 15 ohm max at (ISW = 64mA; VI = 0V)
• Propagation delay is 0.20ns max at (VCC = 2.3V to 2.7V, -40°C to +125°C)
• Operating temperature range from -40°C to +125°C
• TSSOP14 package