74AVCH2T45DC,125

74AVCH2T45DC,125 is a dualbit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low-voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

• Wide supply voltage range from 0.8V to 3.6V for VCC(A) and VCC(B), high noise immunity
• Suspend mode, bus hold on data inputs, inputs accept voltages up to 3.6V
• Low noise overshoot and undershoot < 10% of VCC
• IOFF circuitry provides partial Power-down mode operation
• Latch-up performance exceeds 100mA per JESD 78 Class II
• OFF-state output current is ±2.5µA max at (A or B port; VO = 0 V or VCCO)
• Input capacitance is 1pF typical at (DIR input; VI = 0V or 3.3V; VCC(A) = VCC(B) = 3.3V)
• Propagation delay is 15.8ns at (A to B, 0.8V, Tamb = 25°C)
• Operating temperature range from -40°C to +125°C
• VSSOP8 package