74AVC16T245DGG,118

The 74AVC16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs.The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn and nBn) each with its own output enable (nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

• Wide supply voltage range:
  • V_CC(A): 0.8 V to 3.6 V
  • V_CC(B): 0.8 V to 3.6 V
• Complies with JEDEC standards:
  • JESD8-12 (0.8 V to 1.3 V)
  • JESD8-11 (0.9 V to 1.65 V)
  • JESD8-7 (1.2 V to 1.95 V)
  • JESD8-5 (1.8 V to 2.7 V)
  • JESD8-B (2.7 V to 3.6 V)
• ESD protection:
  • HBM JESD22-A114F Class 3B exceeds 8000 V
  • MM JESD22-A115-A exceeds 200 V
  • CDM JESD22-C101D exceeds 1000 V
• Maximum data rates:
  • 380 Mbit/s (= 1.8 V to 3.3 V translation)
  • 200 Mbit/s (= 1.1 V to 3.3 V translation)
  • 200 Mbit/s (= 1.1 V to 2.5 V translation)
  • 200 Mbit/s (= 1.1 V to 1.8 V translation)
  • 150 Mbit/s (= 1.1 V to 1.5 V translation)
  • 100 Mbit/s (= 1.1 V to 1.2 V translation)
• Suspend mode
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• I_OFF