74AUP2G132GN,115
NAND Gate 2-Element 2-IN CMOS 8-Pin XSON T/R
- RoHS 10 Compliant
- Tariff Charges
The 74AUP2G132 provides the dual 2-input NAND Schmitt trigger function which accepts standard input signals. They can transform slowly changing input signals into sharply defined, jitter-free output signals. This device ensures a very low static and dynamic power consumption across the entire Vcc range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage Vt+ and the negative voltage Vt- is defined as the input hysteresis voltage Vh.
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- ESD protection:
- HBM JESD22-A114F Class 3A exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
- Low static power consumption; Icc = 0.9 µA (maximum)
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 % of Vcc
- Ioff circuitry provides partial Power-down mode operation
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Schmitt Trigger | ||
| Tin | ||
| NAND | ||
| 260 | ||
| 22.6@1.1V to 1.3V|13.3@1.4V to 1.6V|10.6@1.65V to 1.95V|8.5@2.3V to 2.7V|7.8@3V to 3.6V ns | ||
| 0.5 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 0 | ||
| -40 to 125 °C | ||
| 8XSON | ||
| 8 | ||
| 1.2 x 1 x 0.31 mm | ||
| No | ||
| XSON |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |