74AUP2G08GS,115
AND Gate, Dual, 2 Input, 8 Pins, XSON, 74AUP2G08
- RoHS 10 Compliant
- Tariff Charges
The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-B (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F Class 3A exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
- Low static power consumption; ICC = 0.9 µA (maximum)
- Latch-up performance exceeds 100 mA per JESD78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial power-down mode operation
- Multiple package options
- Specified from -40 ? to +85 ? and -40 ? to +125 ?
Technical Attributes
Find Similar Parts
Description | Value | |
---|---|---|
Tin | ||
AND | ||
260 | ||
19.4@1.1V to 1.3V|11.5@1.4V to 1.6V|9.1@1.65V to 1.95V|7.2@2.3V to 2.7V|6.2@3V to 3.6V ns | ||
0.5 uA | ||
Surface Mount | ||
MSL 1 - Unlimited | ||
0 | ||
0 | ||
-40 to 125 °C | ||
8XSON | ||
8 | ||
1.35 x 1 x 0.31 mm | ||
No | ||
XSON |
ECCN / UNSPSC / COO
Description | Value |
---|---|
Country of Origin: | RECOVERY FEE |
ECCN: | EAR99 |
HTSN: | 8542390050 |
Schedule B: | 8542390060 |