74ALVC00PW,118
NAND Gate, Quad, 2 Input, 14 Pins, TSSOP, 74ALVC00
- RoHS 10 Compliant
- Tariff Charges
The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.
- Wide supply voltage range from 1.65 V to 3.6 V
- 3.6 V tolerant inputs/outputs
- CMOS low power consumption
- Direct interface with TTL levels (2.7 V to 3.6 V)
- Power-down mode
- Latch-up performance exceeds 250 mA
- Complies with JEDEC standards:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114E exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- Package TSSOP14
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Gold | ||
| NAND | ||
| 260 | ||
| 2.6@2.7V|2.1@3V to 3.6V ns | ||
| 20 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 0 | ||
| -40 to 85 °C | ||
| 14TSSOP | ||
| 14 | ||
| 5.1 x 4.5 x 0.95 mm | ||
| No | ||
| TSSOP | ||
| 0.2 uA |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |