74AHCT32PW,118
OR Gate, Quad, 2 Input, 14 Pins, TSSOP, 74AHCT32
- RoHS 10 Compliant
- Tariff Charges
The 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHCT32 provides the 2-input OR function.
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Inputs accept voltages higher than VCC
- Input levels:
- For 74AHCT32: TTL level
- ESD protection:
- HBM EIA/JESD22-A114E exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
- CDM EIA/JESD22-C101C exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Gold | ||
| OR | ||
| 260 | ||
| 7.9@5V ns | ||
| 2 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 0 | ||
| -40 to 125 °C | ||
| 14TSSOP | ||
| 14 | ||
| 5.1 x 4.5 x 0.95 mm | ||
| No | ||
| TSSOP |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |