74AHC14D,118
Inverter Schmitt Trigger, Hex, 1 Input, 14 Pins, SOIC, 74AHC14
- RoHS 10 Compliant
- Tariff Charges
The 74AHC14D is a high-speed Si-gate CMOS device provides six inverting buffers with Schmitt-trigger action. The device is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The device is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Inputs accept voltages higher than VCC
- ESD PROT - HBM EIA/JESD22-A114E 2000V, MM EIA/JESD22-A115-A 200V, CDM EIA/JESD22-C101C 1000V
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Schmitt Trigger | ||
| Gold | ||
| AHC | ||
| Inverter Schmitt Trigger | ||
| 260 | ||
| -8 mA | ||
| 8 mA | ||
| 5.5 V | ||
| 16.3@3V to 3.6V|10.6@4.5V to 5.5V ns | ||
| 2 uA | ||
| 2 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 6 | ||
| -40 to 125 °C | ||
| Schmitt Trigger | ||
| 14SO | ||
| 14 | ||
| 8.75 x 4 x 1.45 mm | ||
| 50 pF | ||
| No | ||
| SOIC | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |