MT62F2G64D8EK-023 WT:B
DRAM, LPDDR5, 128 Gbit, 2G x 64bit, FBGA, 441 Pins
- 17.1GB/s maximum bandwidth per channel, selectable CKR (WCK:CK = 2:1 or 4:1)
- Single x16 channel/die, double-data-rate command/address entry
- Differential data clocks (WCK_t/WCK_c), background ZQ calibration/command-based ZQ calibration
- Partial-array self refresh (PASR) and partial-array auto refresh (PAAR) with segment mask
- I/O type: low-swing single-ended, VSS terminated, VOH-compensated output drive
- Dynamic voltage frequency scaling core, single-ended CK, single-ended WCK and single-ended RDQS
- Operating voltage is 1.05V VDD2/0.5V VDDQ
- 2 Gig x 64 configuration
- 441-ball TFBGA package, -25°C = Tc = +85°C operating temperature
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| LPDDR5 | ||
| FBGA | ||
| Surface Mount | ||
| 2G x 64bit | ||
| 441 | ||
| 85 °C | ||
| -25 °C | ||
| 1.05 V V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542320036 |
| Schedule B: | 8542320060 |
Factory Lead Time: