MT53E256M32D2DS-046 AIT:B
DRAM LPDDR4 256MX32 WFBGA AIT
- 256 Meg x 32 configuration, LPDDR4, 2 die addressing
- 468ps, tCK RL = 36/40 cycle time
- Frequency range from 2133 to 10MHz (data rate range from 4266 to 20Mb/s/pin)
- 16n prefetch DDR architecture, 8 internal banks per channel for concurrent operation
- Single-data-rate CMD/ADR entry, bidirectional/differential data strobe per byte lane
- Programmable READ and WRITE latencies (RL/WL)
- Directed per-bank refresh for concurrent bank operation and ease of command scheduling
- On-chip temperature sensor to control self refresh rate, partial-array self refresh (PASR)
- 200-ball WFBGA package, operating temperature range from -40°C to +95°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 2.133 GHz | ||
| Mobile LPDDR4 | ||
| WFBGA | ||
| Surface Mount | ||
| 256M x 32bit | ||
| 8 Gbit | ||
| 200 | ||
| 95 °C | ||
| -40 °C | ||
| 1.1 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542320032 |
| Schedule B: | 8542320060 |
Factory Lead Time: