MT53E1G32D2FW-046 AUT:B
DRAM Chip Mobile LPDDR4 SDRAM 32Gbit 1G X 32 1.1V 200-Pin TFBGA
MT53E1G32D2FW-046 AUT:B is a LPDDR4 SDRAM. It is a 16Gb high-speed, CMOS dynamic random-access memory device. This memory is internally configured with 2 channels or 1 channel ×16 I/O, each channel having 8-banks. It has on-chip temperature sensor to control self refresh rate and programmable READ and WRITE latencies (RL/WL). This memory has directed per-bank refresh for concurrent bank operation and ease of command scheduling. It has single-data-rate CMD/ADR entry with programmable VSS (ODT) termination.
- Operating voltage range is 1.10V (VDD2) / 0.60V or 1.10V (VDDQ)
- 1Gig x 32 configuration, LPDDR4, 2die addressing, clock-stop capability
- Packaging style is 200-ball TFBGA 10 x 14.5 x 1.1mm (Ø0.40 SMD)
- Cycle time is 046 = 468ps, ?CK RL = 36/40
- Operating temperature range is –40°C to +125°C, automotive certified, b design
- Clock rate is 2133MHz, data rate is 4266Mb/s, 16n prefetch DDR architecture
- Frequency range is 2133–10 MHz (data rate range per pin: 4266–20Mb/s)
- 8 internal banks per channel for concurrent operation
- Single-data-rate CMD/ADR entry, bidirectional/differential data strobe per byte lane
- Partial-array self refresh (PASR), selectable output drive strength (DS)
Technical Attributes
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| Description | Value | |
|---|---|---|
| 2.133 GHz | ||
| Mobile LPDDR4 | ||
| TFBGA | ||
| Surface Mount | ||
| 1G x 32bit | ||
| 32 Gbit | ||
| 200 | ||
| 125 °C | ||
| -40 °C | ||
| 1.1 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542320036 |
| Schedule B: | 8542320060 |