MT29F2G08ABAEAH4:E

MT29F2G08ABAEAH4 is a NAND flash memory include an asynchronous data interface for high-performance I/O operations. This device use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address and data. There are five control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection and monitor device status (R/B#). This hardware interface creates a low pin-count device with a standard pinout that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can independent execute commands and report status. A NAND Flash die, in the ONFI specification, is referred to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal.

• Single-level cell (SLC) technology, asynchronous I/O performance, array performance
• Erase block is 700µs (typical), command set is ONFI NAND flash protocol
• Advanced command set, one-time programmable (OTP) mode
• Interleaved die (LUN) operations, read unique ID, internal data move
• Operation status byte provides software method for detecting
• Pass/fail condition, write-protect status, RESET (FFh) required as first command after power-on
• Alternate method of device initialization (Nand-Init) after power up (contact factory)
• 2Gb density, 8bit device width, SLC level
• 3.3V (2.7–3.6V) operating voltage, asynchronous interface
• 63-ball VFBGA (9 x 11 x 1.0mm) package, commercial operating temperature range from 0°C to 70°C