USB3503-I/ML

The USB3503-I/ML is a low-power, USB 2.0 hub controller with HSIC upstream connectivity and three USB 2.0 downtream ports. The USB3503-I/ML operates as a hi-speed hub and supports low-speed, full-speed, and hi-speed downstream devices on all of the enabled downstream ports. The USB3503-I/ML has been specifically optimized for mobile embedded applications. The pin-count has been reduced by optimizing the USB3503-I/ML for mobile battery-powered embedded systems where power consumption, small package size, and minimal BOM are critical design requirements. Standby mode power has been minimized. Instead of a dedicated crystal, reference clock inputs are aligned to mobile applications. Flexible integrated power regulators ease integration into battery powered devices. All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors on D+ and D– pins and all required pull-down resistors on D+ and D– pins. The USB3503-I/ML includes programmable features such as: MultiTRAKTM Technology, which utilizes a dedicated Transaction Translator (TT) per port to maintain consistent full-speed data throughput regardless of the number of active downstream connections. MultiTRAK outperforms conventional USB 2.0 hubs with a single TT in USB full-speed data transfers. PortMap, which provides flexible port mapping and disable sequences. The downstream ports of a USB3503-I/ML hub can be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any port that is disabled, the USB3503-I/ML hub controllers automatically reorder the remaining ports to match the USB host controller’s port numbering scheme. PortSwap, which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the PCB. PHYBoost, which provides programmable levels

• Integrated USB 2.0 Compatible 3-Port Hub.
• HSIC Upstream Port
• Advanced power saving features
  • 1 µA Typical Standby Current
  • Port goes into power saving state when no devices are connected downstream
  • Port is shutdown when port is disabled.
  • Digital core shut down in Standby Mode
• Supports either Single-TT or Multi-TT configurations for Full-Speed and Low-Speed connections.
• Enhanced configuration options available through serial I2C Slave Port
  • VID/PID/DID
  • String Descriptors
  • Configuration options for Hub.
• Internal Default configuration option when serial I2C host not available.
• MultiTRAK
  • Dedicated Transaction Translator per port.
• PortMap
  • Configurable port mapping and disable sequencing.
• PortSwap
  • Configurable differential intra-pair signal swapping.
• PHYBoost
  • Programmable USB trans