SY100EL32VZG-TR
Multiplier/Divider, Divide by 2, 1 Input, 3 GHz, 3.3 V to 5 V, 8 Pins, SOIC
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RoHS 10 Compliant -
Tariff Charges
The SY100EL32V are integrated ÷2 dividers. The differential clock inputs and the VBB allow a differential, single-ended or AC-coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor. Also note that the VBB is designed to be used as an input bias on the EL32V only; the VBB output has limited current sink and source capability. The reset pin is asynchronous and is asserted on the rising edge. Upon power-on, the internal flip-flop will attain a random state; the reset allows for the synchronization of multiple EL32Vs in a system.
3.3V and 5V power supply options 510ps propagation delay 3.0GHz toggle frequency High bandwidth output transistions Internal 75K? input pull-down resistors Available in 8-pin SOIC package
Technical Attributes
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| MSL 3 - 168 hours | ||
| -40 to 85 °C | ||
| 8SOIC | ||
| 8 | ||
| 4.93 x 3.94 x 1.48 mm | ||
| Industrial | ||
| SOIC | ||
| Divider |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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