PIC18F24J11-I/SO

The PIC18F24J11 family implements the optional extension to the PIC18 instruction set, adding eight new instructions and an Indexed Addressing mode. Enabled as a device configuration option, the extension has been specifically designed to optimize re-entrant application code originally developed in high-level languages.

• Deep Sleep mode: CPU off, Peripherals off, Currents Down to 13 nA and 850 nA with RTCC - Able to wake-up on external triggers, programmable WDT or RTCC alarm - Ultra Low-Power Wake-up (ULPWU)
• Sleep mode: CPU off, Peripherals off, SRAM on, Fast Wake-up, Currents Down to 105 nA Typical
• Idle: CPU off, Peripherals on, Currents Down to 2.3 µA Typical
• Run: CPU on, Peripherals on, Currents Down to 6.2 µA Typical
• Timer1 Oscillator/w RTCC: 1 µA, 32 kHz Typical
• Watchdog Timer: 813 nA, 2V Typical Special Microcontroller Features:
• 5.5V Tolerant Inputs (digital only pins)
• Low-Power, High-Speed CMOS Flash Technology
• C Compiler Optimized Architecture for Re-Entrant Code
• Priority Levels for Interrupts
• Self-Programmable under Software Control
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT): - Programmable period from 4 ms to 131s
• Single-Supply In-Circuit Serial Program