PIC16F84-10/SO

All PICmicro microcontrollers employ an advanced RISC architecture. PIC16F8X devices have enhanced core features, eight-level deep stack, and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with a separate 8-bit wide data bus. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches (which require two cycles). A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set is used to achieve a very high performance level. PIC16F84 microcontrollers typically achieve a 2:1 code compression and up to a 4:1 speed improvement (at 20 MHz) over other 8-bit microcontrollers in their class.

• Only 35 single word instructions to learn
• All instructions single cycle except for program branches which are two-cycle
• Operating speed: DC - 10 MHz clock input DC - 400 ns instruction cycle
• 14-bit wide instructions
• 8-bit wide data path
• 15 special function hardware registers
• Eight-level deep hardware stack
• Direct, indirect and relative addressing modes
• Four interrupt sources: - External RB0/INT pin - TMR0 timer overflow - PORTB<7:4> interrupt on change - Data EEPROM write complete
• 1000 erase/write cycles Flash program memory
• 10,000,000 erase/write cycles EEPROM data memory
• EEPROM Data Retention > 40 years Peripheral Features:
• 13 I/O pins with individual direction control
• High current sink/source for direct LED drive - 25 mA sink max. per pin - 20 mA source max. per pin
• TMR0: 8-bit timer/counter with 8-bit programmable prescaler Pin Diagrams Special Microcontroller Fea