PIC16F527T-I/SO

The PIC16F527 device is a low-cost, high-performance, 8-bit, fully-static, Flash based CMOS microcontroller. It employs a RISC architecture with only 36 single-word/single-cycle instructions. All instructions are single cycle except for program branches, which take two cycles. The PIC16F527 device delivers performance an order of magnitude higher than its competitors in the same price category. The 12-bit wide instructions are highly symmetrical, resulting in a typical 2:1 code compression over other 8-bit microcontrollers in its class. The easy-to-use and easy to remember instruction set reduces development time significantly.

The PIC16F527 product is equipped with special features that reduce system cost and power requirements. The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are several oscillator configurations to choose from, including INTRC Internal Oscillator mode and the power-saving LP (Low-Power) Oscillator mode. Power-Saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability.

The PIC16F527 device is available in the cost-effective Flash programmable version, which is suitable for production in any volume.

The PIC16F527 product is supported by a full-featured macro assembler, a software simulator, an in-circuit emulator, a 'C' compiler, a low-cost development programmer and a full-featured programmer. All the tools are supported on IBM PC and compatible machines.

• Interrupt Capability
• PIC16F527 Operating Speed:
  • DC - 20 MHz Crystal oscillator
  • DC - 200 ns Instruction cycle
• High Endurance Program and Flash Data Memory Cells:
  • 1024 x 12 user execution memory
  • 64 x 8 self-writable data memory
  • 100,000 write program memory endurance
  • 1,000,000 write Flash data memory endurance
  • Program and Flash data retention: >40 years
• General Purpose Registers (SRAM):
  • 68 x 8 for PIC16F527
• Only 36 Single-Word Instructions to Learn:
  • Added RETURN and RETFIE instructions
  • Added MOVLB instruction
• All Instructions are Single-Cycle except for Program Branches which are Two-Cycle
• Four-Level Deep Hardware Stack
• Direct, Indirect and Relative Addressing modes for Data and Instructions
• Brown-out Reset (BOR)
• Power-on Reset (POR)
• Device Reset Timer (DRT)
• Watchdog Timer (WD