PIC12LF1552-I/SN

This family of devices contain an enhanced mid-range 8-bit CPU core. The CPU has 49 instructions. Interrupt capability includes automatic context saving. The hardware stack is 16 levels deep and has Overflow and Underflow Reset capability. Direct, Indirect, and Relative addressing modes are available. Two File Select Registers (FSRs) provide the ability to read program and data memory. Automatic Interrupt Context Saving 16-level Stack with Overflow and Underflow File Select Registers Instruction Set

• High-Performance RISC CPU:
• C Compiler Optimized Architecture
• Only 49 Instructions
• 2K Words Linear Program Memory Addressing
• 256 bytes Linear Data Memory Addressing
• Operating Speed:
  • DC – 32 MHz clock input
  • DC – 125 ns instruction cycle
• Interrupt Capability with Automatic Context Saving
• 16-Level Deep Hardware Stack with Optional
• Overflow/Underflow Reset
• Direct, Indirect and Relative Addressing modes:
  • Two full 16-bit File Select Registers (FSRs)
  • FSRs can read program and data memory
• Flexible Oscillator Structure:
• 16 MHz Internal Oscillator Block:
  • Factory calibrated to ±1%, typical
  • Software selectable frequency range from 32 MHz to 31 kHz
• 4x Phase-Lock Loop (PLL), usable with 16 MHz internal oscillator
  • Allows 32 MHz software selectable clock frequency
• 31 kHz Low-Power Internal Osc