MIC68200YML-TR

"The MIC68200 is a high peak current LDO regulator designed specifically for powering applications such as FPGA core voltages that require high start up current with lower nominal operating current. Capable of sourcing 2A of current for start-up, the MIC68200 provides high power from a small MLF® leadless package. The MIC68200 can also implement a variety of power-up and power-down protocols such as sequencing, tracking and ratiometric tracking. The MIC68200 operates from a wide input range of 1.65V to 5.5V. The MIC68200 incorporates a delay pin (DLY) for control of power on reset output (POR) at turn-on and powerdown delay at turn-off. In addition there is a ramp control pin (RC) for either tracking applications or output voltage slew rate adjustment at turn-on."

• Stable with 4.7µF ceramic capacitor
• Input voltage range from 1.65V to 5.5V
• 0.5V reference
• +1.0% initial output tolerance
• 2A maximum output current – peak start up
• 1A continuous operating current
• Tracking on turn-on and turn-off with pin strapping
• Timing controlled sequencing on/off
• Power-on Reset (POR) supervisor with programmable delay time
• Programmable Ramp Control for in-rush current limiting and slew rate control of the output voltage