DSPIC30F5015T-30I/PT
MCU 16-bit dsPIC30 dsPIC RISC 66KB Flash 3.3V/5V 64-Pin TQFP T/R
- RoHS 10 Compliant
- Tariff Charges
- Modified Harvard architecture
- C compiler optimized instruction set architecture with flexible Addressing modes
- 83 base instructions
- 24-bit wide instructions, 16-bit wide data path
- 66 Kbytes on-chip Flash program space (Instruction words)
- 2 Kbytes of on-chip data RAM
- 1 Kbyte of non-volatile data EEPROM
- Dual data fetch
- Accumulator write back for DSP operations
- Modulo and Bit-Reversed Addressing modes
- Two 40-bit wide accumulators with optional saturation logic
- 17-bit x 17-bit single-cycle hardware fractional/integer multiplier
- All DSP instructions single cycle
- ±16-bit single-cycle shift
- 8 PWM output channels
- Complementary or Independent Output modes
- Edge and Center-Aligned modes
- 4 duty cycle generators
- Dedicated time base
- Programmable output polarity
- Dead-Time control for Complementary mode
- Manual output
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 120 MHz | ||
| TQFP | ||
| Surface Mount | ||
| CAN/I2C/SPI/UART | ||
| 52 | ||
| 64 | ||
| 125 °C | ||
| -40 °C | ||
| 66 Kb | ||
| 2 Kb | ||
| 5.5 V | ||
| 2.5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.A.2 |
| HTSN: | 8542310020 |
| Schedule B: | 8542310055 |