ATSAMD21G18A-MU
ARM MCU, 32-bit, ARM Cortex-M0+, 48 MHz, 256 KB, 32 KB, 48 Pins, QFN-EP
- RoHS 10 Compliant
- Tariff Charges
SMARTSAM D21 is a series of low-power microcontrollers using the 32-bit ARM Cortex M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and 32KB of SRAM. The SAM D21 devices operate at a maximum frequency of 48MHz and reach 2.46 CoreMark MHz They are designed for simple and intuitive migration with identical peripheral modules, hex compatible code, identical linear address map and pin compatible migration paths between all devices in the product series. All devices include intelligent and flexible peripherals, Event System for inter-peripheral signaling, and support for capacitive touch button, slider and wheel user interfaces.
- Processor
- ARM Cortex-M0+ CPU running at up to 48MHz
- Single-cycle hardware multiplier
- Micro Trace Buffer (MTB)
- Memories
- 32/64/128/256KB in-system self-programmable Flash
- 4/8/16/32KB SRAM Memory
- System
- Power-on reset (POR) and brown-out detection (BOD)
- Internal and external clock options with 48MHz Digital Frequency Locked Loop (DFLL48M) and 48MHz to 96MHz Fractional Digital Phase Locked Loop (FDPLL96M)
- External Interrupt Controller (EIC)
- 16 external interrupts
- One non-mask able interrupt
- Two-pin Serial Wire Debug (SWD) programming, test and debugging interface
- Low Power
- Idle and standby sleep modes
- SleepWalking peripherals
- Peripherals
- 12-channel Direct Memory Access Controller (DMAC)
- 12-channel Event System
- Up to five 16-bit Timer/Counters (TC), configurable as either:
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 32 Bit | ||
| ARM Cortex M0+ | ||
| QFN EP | ||
| Surface Mount | ||
| I2C/I2S/SPI/UART/USA | ||
| SAM 32 | ||
| SAM D21 | ||
| 38 | ||
| 48 | ||
| 48 | ||
| 85 °C | ||
| -40 °C | ||
| SAM 32 Family SAM D21 Series Microcontrollers |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.A.2 |
| HTSN: | 8542310075 |
| Schedule B: | 8542310075 |