ATSAMC21J17A-MUT

The Microchip SAM C21 devices provide the following features: In-system programmable Flash, twelvechannel direct memory access (DMA) controller, twelve-channel Event System, programmable interrupt controller, up to 52 programmable I/O pins, 32-bit real-time clock and calendar, up to five 16-bit Timer/ Counters (TC) and three Timer/Counters for Control (TCC), where each TC can be configured to perform frequency and waveform generation, accurate program execution timing or input capture with time and frequency measurement of digital signals. The TCs can operate in 8- or 16-bit mode, selected TCs can be cascaded to form a 32-bit TC, and three timer/counters have extended functions optimized for motor, lighting and other control applications. Two TCC can operate in 24-bit mode, and the third TCC can operate in 16- bit mode. The series provide up to six Serial Communication Modules (SERCOM) that each can be configured to act as an USART, UART, SPI, I2C up to 3.4MHz, SMBus, PMBus, RS-485 and LIN master/slave; two 12-bit, 1Msps ADCs with up to 12-channels each (20 unique channels total), three 24-bit, 1.5Msps Sigma-Delta ADC , one 10-bit 300ksps DAC, four analog comparators with window mode, Peripheral Touch Controller supporting up to 256 buttons, sliders, wheels and proximity sensing; programmable Watchdog Timer, brown-out detector and power-on reset and two-pin Serial Wire Debug (SWD) program and debug interface. All devices have accurate and low-power external and internal oscillators. All oscillators can be used as a source for the system clock. Different clock domains can be independently configured to run at different frequencies, enabling power saving by running each peripheral at its optimal clock frequency, and thus maintaining a high CPU frequency while reducing power consumption. The SAM C21 devices have three software-selectable sleep modes, idle, standby and off. In idle mode the CPU is stopped while all other functions can be kept running. In standby a

• Processor
  • ARM Cortex-M0+ CPU running at up to 48MHz
  • Single-cycle hardware multiplier
  • Micro Trace Buffer
  • Memory Protection Unit (MPU)
• Memories
  • 32/64/128/256KB in-system self-programmable Flash
  • 1/2/4/8KB independent self-programmable Flash for EEPROM emulation
  • 4/8/16/32KB SRAM Main Memory
• System
  • Power-on reset (POR) and brown-out detection (BOD)
  • Internal and external clock options with 48MH--to 96MH--Fractional Digital Phase Locked Loop (FDPLL96M)
  • External Interrupt Controller (EIC)
  • 16 external interrupts
  • One non-maskable interrupt
  • Two-pin Serial Wire Debug (SWD) programming, test and debugging interface
• Low Power
  • Idle, standby, and off sleep modes
  • SleepWalking peripherals
• Peripherals
  • Hardware Divide and Square Root Accelerator (DIVAS)
  • 12-channel Direct Memory Access Controll