ATMEGA8535L-8AU

The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVRenhanced RISC architecture. By executing instructions in a single clock cycle, theATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the systemdesigner to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers.All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing twoindependent registers to be accessed in one single instruction executed in one clockcycle. The resulting architecture is more code efficient while achieving throughputs up toten times faster than conventional CISC microcontrollers. The ATmega8535 provides the following features: 8K bytes of In-System ProgrammableFlash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes SRAM, 32general purpose I/O lines, 32 general purpose working registers, three flexibleTimer/Counters with compare modes, internal and external interrupts, a serial programmableUSART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC withoptional differential input stage with programmable gain in TQFP package, a programmableWatchdog Timer with Internal Oscillator, an SPI serial port, and six softwareselectable power saving modes. The Idle mode stops the CPU while allowing theSRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. ThePower-down mode saves the register contents but freezes the Oscillator, disabling allother chip functions until the next interrupt or Hardware Reset. In Power-save mode, theasynchronous timer continues to run, allowing the user to maintain a timer base whilethe rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU andall I/O modules except asynchronous timer and ADC, to minimize switching noise duringADC conversions. In Standby mode, the crystal/resonator Oscillator is running while therest of the device is sleeping. This allows ver

• High-performance, Low-power AVR® 8-bit Microcontroller
• Advanced RISC Architecture
  • 130 Powerful Instructions
  • Most Single Clock Cycle Execution
  • 32 x 8 General Purpose Working Registers
  • Fully Static Operation
  • Up to 16 MIPS Throughput at 16 MHz
  • On-chip 2-cycle Multiplier
• Nonvolatile Program and Data Memories
  • 8K Bytes of In-System Self-Programmable Flash Endurance: 10,000 Write/Erase Cycles
  • Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
  • 512 Bytes EEPROM Endurance: 100,000 Write/Erase Cycles
  • 512 Bytes Internal SRAM
  • Programming Lock for Software Security
• Peripheral Features
  • Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
  • One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
  • Real Time Counter with Separ