ATMEGA165PV-8AUR

The ATmega165P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega165P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega165P provides the following features: 16 Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 512 bytes EEPROM, 1 Kbyte SRAM, 53 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip Debugging support and programming, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while

• High Performance, Low Power AVR® 8-Bit Microcontroller
• Advanced RISC Architecture
  • 130 Powerful Instructions
  • Most Single Clock Cycle Execution
  • 32 × 8 General Purpose Working Registers
  • Fully Static Operation
  • Up to 16 MIPS Throughput at 16 MHz
  • On-Chip 2-cycle Multiplier
• High Endurance Non-volatile Memory segments
  • 16 Kbytes of In-System Self-programmable Flash program memory
  • 512 Bytes EEPROM
  • 1 Kbytes Internal SRAM
  • Write/Erase cyles: 10,000 Flash/100,000 EEPROM(1)(3)
  • Data retention: 20 years at 85°C/100 years at 25°C(2)(3)
  • Optional Boot Code with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
  • Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 compliant) Interface
  • Boundary-scan Capabilities According to the JTAG Standard
  • Extensive On-chip Debug Support