ATF750CL-15JU

The ATF750C(L) is twice as powerful as most other 24-pin programmable logic devices. Increased product terms, sum terms, flip-flops and output logic configurations translate into more usable gates. High-speed logic and uniform predictable delays guarantee fast in-system performance. The ATF750C(L) is a high-performance CMOS (electrically-erasable) complex programmable logic device (CPLD) that utilizes Microchip’s proven electricallyerasable technology. Each of the ATF750C(L)’s 22 logic pins can be used as an input. Ten of these can be used as inputs, outputs or bi-directional I/O pins. Each flip-flop is individually configurable as either D- or T-type. Each flip-flop output is fed back into the array independently. This allows burying of all the sum terms and flip-flops. There are 171 total product terms available. There are two sum terms per output, providing added flexibility. A variable format is used to assign between four to eight product terms per sum term. Much more logic can be replaced by this device than by any other 24-pin PLD. With 20 sum terms and flip-flops, complex state machines are easily implemented with logic to spare. Product terms provide individual clocks and asynchronous resets for each flip-flop. Each flip-flop may also be individually configured to have direct input pin controlled clocking. Each output has its own enable product term. One product term provides a common synchronous preset for all flip-flops. Register preload functions are provided to simplify testing. All registers automatically reset upon power-up. The ATF750CL is a low-power device with speeds as fast as 15 ns. The ATF750CL provides the optimum low-power CPLD solution. This device significantly reduces total system power, thereby allowing battery-powered operations.

• Advanced, High-speed, Electrically-erasable Programmable Logic Device
  • Superset of 22V10
  • Enhanced Logic Flexibility
  • Backward Compatible with ATV750B/BL and ATV750/L
• Low-power Edge-sensing L" Option with 1 mA Standby Current
• D- or T-type Flip-flop
• Product Term or Direct Input Pin Clocking for Flip-flop
• 7.5 ns Maximum Pin-to-pin Delay with 5V Operation
• Highest Density Programmable Logic Available in 24-pin and 28-pin Packages
  • Advanced Electrically-erasable Technology
  • Reprogrammable
  • 100% Tested
• Increased Logic Flexibility
  • 42 Array Inputs, 20 Sum Terms and 20 Flip-flops
• Enhanced Output Logic Flexibility
  • All 20 Flip-flops Feed Back Internally
  • 10 Flip-flops are also Available as Outputs
• Programmable Pin-keeper Circuits
• Dual-in-line and Surface Mount Package in Standard Pinouts
• Full Military, Com"