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ATF2500C-20PU

CPLD ATF2500C Family 2.5K Gates 24 Macro Cells 50MHz EECMOS Technology 5V 40-Pin PDIP

Manufacturer:Microchip
Product Category: Programmable Logic, CPLDs
Avnet Manufacturer Part #: ATF2500C-20PU
Secondary Manufacturer Part#: ATF2500C-20PU
  • Legend Information Icon RoHS 10 Compliant
  • Legend Information Icon Tariff Charges

The ATF2500C is the highest-density PLD available in a 44-pin surface mount package. With its fully connected logic array and flexible macrocell structure, high gate utilization is easily obtainable. The ATF2500C is a high-performance CMOS (electrically-erasable) programmable logic device (PLD) that utilizes proven electrically-erasable technology. This PLD is now available in a fully Green or LHF (lead and halide-free) packages. The ATF2500C is organized around a single universal array. All pins and feedback terms are always available to every macrocell. Each of the 38 logic pins are array inputs, as are the outputs of each flip-flop. In the ATF2500C, four product terms are input to each sum term. Furthermore, each macrocell’s three sum terms can be combined to provide up to 12 product terms per sum term with no performance penalty. Each flip-flop is individually selectable to be either D- or T-type, providing further logic compaction. Also, 24 of the flip-flops may be bypassed to provide internal combinatorial feedback to the logic array. Product terms provide individual clocks and asynchronous resets for each flip-flop. The flip-flops may also be individually configured to have direct input pin clocking. Each output has its own enable product term. Eight synchronous preset product terms serve local groups of either four or eight flip-flops. Register preload functions are provided to simplify testing. All registers automatically reset upon power-up.

  • High-performance, High-density, Electrically-erasable Programmable Logic Device
  • Fully Connected Logic Array with 416 Product Terms
  • 15 ns Maximum Pin-to-pin Delay for 5V Operation
  • 24 Flexible Output Macrocells
    • 48 Flip-flops – Two per Macrocell
    • 72 Sum Terms
    • All Flip-flops, I/O Pins Feed in Independently
  • D- or T-type Flip-flops
  • Product Term or Direct Input Pin Clocking
  • Registered or Combinatorial Internal Feedback
  • Backward Compatible with ATV2500B/BQ and ATV2500H Software
  • Advanced Electrically-erasable Technology
    • Reprogrammable
    • 100% Tested
  • 44-lead Surface Mount Package and 40-pin DIP Package
  • Flexible Design: Up to 48 Buried Flip-flops and 24 Combinatorial Outputs Simultaneously
  • 8 Synchronous Product Terms
  • Individual Asynchronous Reset per Macrocell
  • OE Control per Macrocell
  • Functionality Equivalent to ATV2500B/

Technical Attributes

Find Similar Parts

Description Value
PDIP
Through Hole
24
40
24
85 °C
-40 °C

ECCN / UNSPSC / COO

Description Value
Country of Origin: RECOVERY FEE
ECCN: EAR99
HTSN: 8542310055
Schedule B: 8542310055
In Stock :  9.0
Ships in 1 bus. day
Additional inventory
Factory Lead Time: 56 Weeks
Price for: Each
Quantity:
Min:1  Mult:1  
USD $:
1+
$9.93243
2+
$9.85
4+
$9.8
8+
$9.75
16+
$9.1875