AT91SAM9G25-CU-999

The SAM9G25 is a member of the Microchip | SMART series of 400 MHz ARM926EJ-S embedded microprocessor units. This MPU features connectivity peripherals, a high data bandwidth architecture and a small footprint package option, making it an optimized solution for industrial applications. The SAM9G25 interface peripherals include a camera interface that supports direct connection to the ITU-R BT. 601/656 8-bit mode compliant sensors and up to 12-bit grayscale sensors. Communication peripherals include a soft modem supporting exclusively the Conexant SmartDAA line driver, HS (480 Mbps) USB Host and Device ports with on-chip transceivers, FS USB Host, 10/100 Ethernet MAC, two HS SDCard/SDIO/MMC interfaces, USARTs, SPIs, I2S, multiple TWIs and 10-bit ADC. The multi-layer bus matrix is linked to 2 x 8 DMA channels as well as DMAs dedicated to the communication and interface peripherals, ensuring uninterrupted data transfers with minimal processor overhead. The External Bus Interface incorporates controllers for 4-bank and 8-bank DDR2/LPDDR, SDRAM/LPSDRAM, static memories, as well as specific circuitry for MLC/SLC NAND Flash with integrated ECC up to 24 bits. The SAM9G25 is available in a 217-ball BGA package with 0.8 mm ball pitch, as well as in 247-ball TFBGA and 247-ball VFBGA packages with 0.5 mm ball pitch, making it ideally suited for space-constrained applications.

• Core
  • ARM926EJ-S™ ARM® Thumb® Processor running at up to 400 MH--@ 1.0V +/- 10%
  • 16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Memory Management Unit
• Memories
  • One 64-Kbyte internal ROM embedding bootstrap routine: Boot on NAND Flash, SDCard, DataFlash or serial DataFlash. Programmable order.
  • One 32-Kbyte internal SRAM, single-cycle access at system speed
  • High Bandwidth Multi-port DDR SDR SDRAM Controller (DDRSDRC)
  • 32-bit External Bus Interface supporting 4-bank and 8-bank DDR2/LPDDR, SDR/LPSDR, Static Memories
  • MLC/SLC 8-bit NAND Controller, with up to 24-bit Programmable Multi-bit Error Correcting Code (PMECC)
• Low Power Mode
  • Shutdown Controller with four 32-bit Battery Backup Registers
  • Clock Generator and Power Management Controller
  • Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
• Peripherals
  • IT