AT89C51ID2-SLSUM

The AT89C51ID2 retains all features of the 80C52 with 256 bytes of internal RAM, a 10-source 4-level interrupt controller and three timer/counters. In addition, the AT89C51ID2 has a Programmable Counter Array, an XRAM of 1792 bytes, a Hardware Watchdog Timer, SPI and Keyboard, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a speed improvement mechanism (X2 mode). The fully static design of the AT89C51ID2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The AT89C51ID2 has 2 software-selectable modes of reduced activity and 8-bit clock presale for further reduction in power consumption. In the Idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative. The added features of the AT89C51ID2 make it more powerful for applications that need pulse width modulation, high speed I/O and counting capabilities such as alarms, motor control, corded phones, smart card readers.

• 80C52 Compatible
  • 8051 Instruction Compatible
  • Six 8-bit I/O Ports (64 pins or 68 Pins Versions)
  • Four 8-bit I/O Ports (44 Pins Version)
  • Three 16-bit Timer/Counters
  • 256 bytes Scratch Pad RAM
  • 10 Interrupt Sources With 4 Priority Levels
• ISP (In-System Programming) Using Standard VCC Power Supply
• Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply
• Boot ROM Contains Low Level Flash Programming Routines and a Default Serial Loader
• Dual Data Pointer
• 32 KHz Crystal Oscillator
• Variable Length MOVX for Slow RAM/Peripherals
• Improved X2 Mode with Independant Selection for CPU and Each Peripheral
• Keyboard Interrupt Interface on Port 1
• SPI Interface (Master/Slave Mode)
• 8-bit Clock Prescaler
• Two Wire Interface 400K bit/s
• Asynchronous Port Reset
• Full Duplex Enhanced UART with Dedicated Internal Baud Rate Generator