AT32UC3B0256-Z2UT

The AT32UC3B is a complete System-On-Chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 60 MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. Higher computation capability is achieved using a rich set of DSP instructions. The AT32UC3B incorporates on-chip Flash and SRAM memories for secure and fast access. The Peripheral Direct Memory Access controller enables data transfers between peripherals and memories without processor involvement. PDCA drastically reduces processing overhead when transferring continuous and large data streams between modules within the MCU. The Power Manager improves design flexibility and security: the on-chip Brown-Out Detector monitors the power supply, the CPU runs from the on-chip RC oscillator or from one of external oscillator sources, a Real-Time Clock and its associated timer keeps track of the time. The Timer/Counter includes three identical 16-bit timer/counter channels. Each channel can be independently programmed to perform frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. The PWM modules provides seven independent channels with many configuration options including polarity, edge alignment and waveform non overlap control. One PWM channel can trigger ADC conversions for more accurate close loop control implementations.

• Multi-hierarchy Bus System
  • High-Performance Data Transfers on Separate Buses for Increased Performance
  • 7 Peripheral DMA Channels Improves Speed for Peripheral Communication
• Internal High-Speed Flash
  • 512K Bytes, 256K Bytes, 128K Bytes, 64K Bytes Versions
  • Single Cycle Access up to 30 MHz
  • Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
  • 4ms Page Programming Time and 8ms Full-Chip Erase Time
  • 100,000 Write Cycles, 15-year Data Retention Capability
  • Flash Security Locks and User Defined Configuration Area
• Internal High-Speed SRAM, Single-Cycle Access at Full Speed
  • 96K Bytes (512KB Flash), 32K Bytes (256KB and 128KB Flash), 16K Bytes (64KB Flash)
• Interrupt Controller
  • Autovectored Low Latency Interrupt Service with Programmable Priority
• System Functions
  • Power and Clock Manager Including Internal RC Clock and One