MX29LV400CBXEI-70G
Flash Mem Parallel 3V/3.3V 4M-Bit 512K x 8/256K x 16 70ns 48-Pin CSP
- RoHS 10 Compliant
- Tariff Charges
The MX29LV400C T/B is a 4-mega bit Flash memory organized as 512K bytes of 8 bits or 256K words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV400C T/B is packaged in 44-pin SOP, 48-pin TSOP and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV400C T/B offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV400C T/B has separate chip enable (CE#) and output enable (OE#) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV400C T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29LV400C T/B uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V
- Extended single - supply voltage range 2.7V to 3.6V
- 524,288 x 8/262,144 x 16 switchable
- Single power supply operation
- 3.0V only operation for read, erase and program operation
- Fully compatible with MX29LV400T/B device
- Fast access time: 55R/70/90ns
- Low power consumption
- 30mA maximum active current
- 0.2µA typical standby current
- Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x1, and 64K-Byte x7)
- Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with Erase Suspend capability
- Automatically program and verify data at specified address
- Erase suspend/Erase Resume
- Suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the eras
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 70 ns | ||
| 19, 18 Bit | ||
| Sectored | ||
| Asymmetrical | ||
| Yes | ||
| NOR | ||
| 4 Mbit | ||
| No | ||
| Yes | ||
| Parallel | ||
| Parallel | ||
| Bottom | ||
| 32/Chip s | ||
| 30 mA | ||
| 13500/Chip ms | ||
| 70 ns | ||
| 4 Mbit | ||
| Surface Mount | ||
| 48 | ||
| 8, 16 Bit | ||
| 512, 256 kWords | ||
| 30 ns | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 48CSP | ||
| 48 | ||
| 8 x 6 x 0.65 mm | ||
| 30 mA | ||
| 2.7 to 3.6 V | ||
| Industrial | ||
| No | ||
| CSP | ||
| 3, 3.3 V | ||
| 3, 3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.1.B.1 |
| HTSN: | 8542320071 |
| Schedule B: | 8542320040 |