MX29F200CBTI-70G
Flash Parallel 5V 2Mbit 256K/128K x 8bit/16bit 70ns 48-Pin TSOP-I
- RoHS 10 Compliant
- Tariff Charges
The MX29F200C T/B is a 2-mega bit, single 5 Volt Flash memory organized as 1M word x16 or 2M bytex8 MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29F200C T/B is packaged in 44-pin SOP and 48- pin TSOP. It is designed to be reprogrammed and erased in-system or in-standard EPROM programmers. The standard MX29F200C T/B offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F200C T/B has separate chip enable (CE#) and output enable (OE# ) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F200C T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29F200C T/B uses a 5.0V ± 10% VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
- 5.0V±10% for read, erase and write operation
- 131072x16/262144x8 switchable
- Fast access time: 55/70/90ns
- Compatible with MX29F200T/B device
- Low power consumption
- 40mA maximum active current@5MHz
- 1uA typical standby current
- Command register architecture
- Byte/Word Programming (9us/11us typical)
- Sector Erase (16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x3)
- Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors or the whole chip with Erase Suspend capability.
- Automatically program and verify data at specified address
- Status Reply
- Data# Polling & Toggle bit for detection of program and erase cycle completion.
- Ready/Busy# pin(RY/BY#)
- Provides a hardware method or detecting program or erase cycle completion
- Compatibility with JEDEC standard
- Pinout and sof
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 70 ns | ||
| 17 Bit | ||
| Sectored | ||
| Asymmetrical | ||
| Yes | ||
| 2 Mbit | ||
| No | ||
| Yes | ||
| Parallel | ||
| Parallel | ||
| Bottom | ||
| 32/Chip s | ||
| 50 mA | ||
| 5.5 V | ||
| 3/Byte ms | ||
| 70 ns | ||
| 2 Mbit | ||
| Surface Mount | ||
| 48 | ||
| 8, 16 Bit | ||
| 256, 128 kWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 48TSOP-I | ||
| 48 | ||
| 12 x 18.4 x 1 | ||
| 4.5 to 5.5 V | ||
| No | ||
| Industrial | ||
| No | ||
| TSOP-I | ||
| 5.5 V | ||
| 5 V | ||
| 5.0000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.1.B.1 |
| HTSN: | 8542320071 |
| Schedule B: | 8542320040 |