MX29F040CQI-70G/TR
Flash Parallel 5V 4Mbit 512K x 8bit 70ns 32-Pin PLCC
- RoHS 10 Compliant
- Tariff Charges
The MX29F040C is a 4-mega bit Flash memory organized as 512K bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write nonvolatile random access memory. The MX29F040C is packaged in 32-pin PLCC, TSOP, PDIP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29F040C offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F040C has separate chip enable (CE#) and output enable (OE#) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F040C uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and program mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29F040C uses a 5.0V±10% VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
- 524,288 x 8 only
- Single power supply operation
- 5.0V only operation for read, erase and program operation
- Fast access time: 55/70/90ns
- Compatible with MX29F040 device
- Low power consumption
- 30mA maximum active current(5MHz)
- 1uA typical standby current
- Command register architecture
- Byte Programming (9us typical)
- Sector Erase 8 equal sectors of 64K-Byte each
- Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with Erase Suspend capability
- Automatically program and verify data at specified address
- Erase suspend/Erase Resume
- Suspends an erase operation to read data from, or program data to, another sector that is not being erased then resumes the erase
- Status Reply
- Data# Polling & Toggle bit for detection of program and erase cycle completion
- Se
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 70 ns | ||
| 19 Bit | ||
| Sectored | ||
| Symmetrical | ||
| No | ||
| 4 Mbit | ||
| No | ||
| Yes | ||
| Parallel | ||
| Parallel | ||
| 32/Chip s | ||
| 50 mA | ||
| 3/Byte ms | ||
| 70 ns | ||
| 4 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 32 | ||
| 8 Bit | ||
| 512 kWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 32PLCC | ||
| 32 | ||
| 14.05 x 11.43 x 2.79 | ||
| 4.5 to 5.5 V | ||
| No | ||
| Industrial | ||
| No | ||
| PLCC | ||
| 5 V | ||
| 5.0000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.1.B.1 |
| HTSN: | 8542320071 |
| Schedule B: | 8542320040 |