MX25U4033EM1I-12G

The MX25U4033E is 4,194,304 bit Serial NOR Flash memory, which is configured as 1,048,576 x 4 internally. The MX25U4033E features a serial peripheral interface and software protocol allowing operation on a simple 4-wire bus while it is in single I/O mode. The four bus signals are a clock input (SCLK), a serial data input (SI), a serial data output (SO) and a chip select (CS#). Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25U4033E MXSMIO® (Serial Multi I/O) provides sequential read operation on the whole chip.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis. Erase command is executed on 4K-byte sector, 32K-byte block, or 64K-byte block, or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via the WIP bit. Advanced security features enhance the protection and security functions.

When the device is not in operation and CS# is high, it is put in standby mode.

The MX25U4033E utilizes memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

• Single Power Supply Operation
  • 1.65 to 2.0 volt for read, erase, and program operations
• Supports Serial Peripheral Interface - Mode 0 and Mode 3
• 4M: 4,194,304 x 1 bit structure or 2,097,152 x 2 bits (two I/O read mode) structure or 1,048,576 x 4 bits (four I/O read mode) structure
• 128 Equal Sectors with 4K byte each
  • Any Sector can be erased individually
• 16 Equal Blocks with 32K byte each
  • Any Block can be erased individually
• 8 Equal Blocks with 64K byte each
  • Any Block can be erased individually
• Program Capability
  • Byte base
  • Page base (256 bytes)
• Latch-up protected to 100mA from -1V to Vcc +1V