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MX25L3233FZNI-08G/TR

Flash Memory, Serial NOR, 32 Mbit, 4M x 8bit, SPI, WSON, 8 Pins

Manufacturer:Macronix
Product Category: Memory, Flash Memory
Avnet Manufacturer Part #: MX25L3233FZNI-08G/TR
Secondary Manufacturer Part#: MX25L3233FZNI-08G/TR
  • Legend Information Icon RoHS 10 Compliant
  • Legend Information Icon Tariff Charges

The MX25L3233F is 32Mb bits Serial Flash memory, which is configured as 4,194,304 x 8 internally. When it is in four I/O mode, the structure becomes 8,388,608 bits x 4. When it is in two I/O mode, the structure becomes 16,777,216 bits x 2. MX25L3233F features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.

The MX25L3233F, MXSMIO® (Serial Multi I/O) flash memory, provides sequential read operation on the whole chip and multi-I/O features.

When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data Input/Output.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis. Erase command is executed on 4K-byte sector, 32K-byte/64K-byte block, or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

When the device is not in operation and CS# is high, it is put in standby mode.

The MX25L3233F utilizes memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

  • 32Mb serial flash memory
  • Serial Peripheral Interface (SPI) compatible - Mode 0 and Mode 3
  • 33,554,432 x 1 bit structure or 16,777,216 x 2 bits (two I/O read mode) structure or 8,388,608 x 4 bits (four I/O mode) structure
  • 1024 Equal Sectors with 4K bytes each
    • Any Sector can be erased individually
  • 128 Equal Blocks with 32K bytes each
    • Any Block can be erased individually
  • 64 Equal Blocks with 64K bytes each
    • Any Block can be erased individually
  • Power Supply Operation
    • 2.65 ~ 3.6 volt for read, erase, and program operations
  • Latch-up protected to 100mA from -1V to Vcc +1V

Technical Attributes

Find Similar Parts

Description Value
133 MHz
3 V

ECCN / UNSPSC / COO

Description Value
Country of Origin: RECOVERY FEE
ECCN: 3A991.B.1.A
HTSN: 8542320071
Schedule B: 8542320040
In Stock :  0
Additional inventory
Factory Lead Time: 112 Weeks
Price for: Each
Quantity:
Min:4000  Mult:4000  
USD $:
4000+
$0.4928
8000+
$0.4736
16000+
$0.4544
24000+
$0.4352
32000+
$0.4272