MX25L1633EZUI-10G
NOR Flash Serial-SPI 3.3V 16Mbit 16M/8M/4M x 1bit/2bit/4bit 9ns 8-Pin USON
- RoHS 10 Compliant
- Tariff Charges
The MX25L1633E is a 16,777,216 bit serial Flash memory, which is configured as 2,097,152 x 8 internally. When it is in two or four I/O read mode, the structure becomes 8,388,608 bits x 2 or 4,194,304 bits x 4. The MX25L1633E feature a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# pin and NC pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25L1633E provides sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis, and erase command is executes on sector (4K-byte), or block (64K-byte), or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions. When the device is not in operation and CS# is high, it is put in standby mode and draws less than 25uA (typical:1uA) DC current. The MX25L1633E utilizes Macronix proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.
- Serial Peripheral Interface compatible - Mode 0 and Mode 3
- 16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure or 4,194,304 x 4 bits (four I/O read mode) structure
- 512 Equal Sectors with 4K byte each
- Any Sector can be erased individually
- 32 Equal Blocks with 64K byte each
- Any Block can be erased individually
- Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
- Latch-up protected to 100mA from -1V to Vcc +1V
Technical Attributes
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| Description | Value |
|---|
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.1.B.1 |
| HTSN: | 8542320071 |
| Schedule B: | 8542320040 |