IS66WV1M16EBLL-55BLI
SRAM Chip Async Single 3.3V 16M-Bit 1M x 16 55ns 48-Pin TFBGA
The IS66WV1M16EBLL are high-speed,16M bit static RAMs organized as 1M words by 16 bits. It is fabricated using high performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS1# is HIGH (deselected) or when CS2 is LOW (deselected), the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE#) controls both writing and reading of the memory. A data byte allows Upper Byte (UB#) and Lower Byte (LB#) access. The IS66WV1M16EBLL are packaged in the JEDEC standard 48-ball mini BGA (6mm x 8mm).
- High-Speed access time : -60ns
- CMOS Lower Power Operation
- Single Power Supply Vdd =2.5V to 3.6V
- Three State Outputs
- Data Control for Upper and Lower bytes
- Lead-free Available
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 20 Bit | ||
| 16 Mbit | ||
| Tin-Silver-Copper | ||
| 260 | ||
| 28 mA | ||
| 55 ns | ||
| 16 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 48 | ||
| 16 Bit | ||
| 16 Bit | ||
| 1 | ||
| 1 MWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 48TFBGA | ||
| 48 | ||
| 6 x 8 x 0.9(Max) | ||
| No | ||
| Industrial | ||
| TFBGA | ||
| 3.6 V | ||
| 2.5 V | ||
| 3.3 V | ||
| 3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542320002 |
| Schedule B: | 8542320040 |
Factory Lead Time: