IS65WV102416DBLL-55CTLA3
SRAM Chip Async Single 3.3V 16M-Bit 1M x 16 55ns 48-Pin TSOP-I
The IS65WV102416DBLL are ultra low power CMOS 16Mbit static RAMs organized as 1M words by 16 bits. It is fabricated using high performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. The IS62WV102416DBLL are packaged in 48-Pin TSOP (TYPE I).
- High-speed access time: 45ns, 55ns.
- CMOS low power operation
- 25 µA (typical) CMOS stand by
- CMOS for optimum speed and power and TTL compatible interface levels
- Single power supply: 2.2V to 3.6V Vdd
- Fully static operation: no Clock or refresh required
- Automotive temperature support
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 20 Bit | ||
| 16 Mbit | ||
| Matte Tin | ||
| 260 | ||
| 12 mA | ||
| 55 ns | ||
| 16 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 48 | ||
| 16 Bit | ||
| 16 Bit | ||
| 1 | ||
| 1 MWords | ||
| -40 to 125 °C | ||
| 125 °C | ||
| -40 °C | ||
| 48TSOP-I | ||
| 48 | ||
| 12 x 20 x 1.05(Max) | ||
| No | ||
| Automotive | ||
| TSOP-I | ||
| 3.3 V | ||
| 3.3000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.A |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |