IS62WV51216EALL-55BLI-TR
SRAM Chip Async Single 1.8V 8M-Bit 512K x 16 55ns 48-Pin VFBGA T/R
The IS62WV51216ALL are high-speed, 8M bit static RAMs organized as 512K words by 16 bits. It is fabricated using 's high performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS1\ is HIGH (deselected) or when CS2 is low (deselected) or when CS1 is low , CS2 is high and both LB\ and UB\ are HIGH, the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE/) controls both writing and reading of the memory. A data byte allows Upper Byte (UB/) and Lower Byte (LB/) access. The IS62WV51216ALL are packaged in the JEDEC standard 48-pin mini BGA (6mm x8mm), 44-Pin TSOP (TYPE II) and 48-pin TSOP (TYPE l).
- High-speed access time: 45ns, 55ns
- CMOS low power operation
- 36 mW (typical) operating
- TTL compatible interface levels
- Single power supply
- 1.65V-2.2V Vdd (62/65WV51216EALL)
- 2.2V-3.6V Vdd (62/65WV51216EBLL)
- Data control for upper and lower bytes
- Automotive temperature (-40°C to +125°C)
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 19 Bit | ||
| 8 Mbit | ||
| Tin-Silver-Copper | ||
| 260 | ||
| 15 mA | ||
| 55 ns | ||
| 8 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 48 | ||
| 16 Bit | ||
| 16 Bit | ||
| 1 | ||
| 512 kWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 48VFBGA | ||
| 48 | ||
| 6 x 8 x 0.7(Max) | ||
| No | ||
| Industrial | ||
| VFBGA | ||
| 1.8 V | ||
| Asynchronous | ||
| 1.8000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.A |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Lead Time Unavailable