IS61WV25616BLS-25TLI
SRAM Chip Async Single 2.5V/3.3V 4M-Bit 256K x 16 25ns 44-Pin TSOP-II
The IS61WV25616BLS are high-speed, 4,194,304-bit static RAMs organized as 262,144 words by 16 bits. It is fabricated using high performance CMOS technology.This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE\ is HIGH (deselected), the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE\ and OE\. The active LOW Write Enable (WE\) controls both writing and reading of the memory. A data byte allows Upper Byte (UB\) and Lower Byte (LB\) access. The IS61WV25616BLS are packaged in the JEDEC standard, 44-pin TSOP Type II .
- High Speed:
- High-speed access time: 8, 10, 20 ns
- Low Active Power: 85 mW (typical)
- Low Standby Power: 7 mW (typical) CMOS standby
- Single power supply: Vdd 2.4V to 3.6V
- Fully static operation: no clocks or refresh required
- Three state outputs
- Data control for upper and lower bytes
- Automotive temperature support
- Lead-free available
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 18 Bit | ||
| 4 Mbit | ||
| Matte Tin | ||
| 260 | ||
| 25 mA | ||
| 25 ns | ||
| 4 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 44 | ||
| 16 Bit | ||
| 16 Bit | ||
| 1 | ||
| 256 kWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 44TSOP-II | ||
| 44 | ||
| 18.52 x 10.29 x 1.05 mm | ||
| No | ||
| Industrial | ||
| TSOP-II | ||
| 3.6 V | ||
| 2.4 V | ||
| 3.3, 3.3 V | ||
| Asynchronous | ||
| 2.5, 3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.A |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |