IS61WV25616BLL-10TL
SRAM, 4 Mbit, 256K x 16bit, 3.3V, 44 Pins, TSOP-II
IS61WV25616BLL-10TL is a high-speed, 4,194,304-bit static RAM organized as 262,144 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When active low CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, active low CE and active low OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (active low UB) and Lower Byte (active low LB) access.
- High-speed access time of 10ns
- Low active power of 85mW (typical), low standby power of 7mW (typical) CMOS standby
- Fully static operation: no clock or refresh required
- Three state outputs
- Data control for upper and lower bytes
- Single power supply range from 2.4V to 3.6V VDD
- Available in 48 pin TSOP (Type II) package
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| TSOP-II | ||
| Surface Mount | ||
| 256K x 16bit | ||
| 4 Mbit | ||
| 44 | ||
| 70 °C | ||
| 0 °C | ||
| Asynchronous SRAM | ||
| 3.6 V | ||
| 2.4 V | ||
| 3.3 V | ||
| Asynchronous |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | PROJECTED FEE |
| ECCN: | 3A991.B.2.A |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |