IS61LPS51236B-200TQLI

The 18Mb product family features high-speed, lowpower synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications. The IS61LPS51236B is organized as 524,288 words by 36bits. Fabricated with ISSI's advanced CMOS technology, the device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input. Write cycles are internally self-timed and are initiated by the rising edge of the clock input. Write cycles can be one to four bytes wide as controlled by the write control inputs.

• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
• control
• Burst sequence control using MODE input
• Three chip enable option for simple depth expansion and address pipelining
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JEDEC 100-pin QFP, 165-ball BGA and 119-ball BGA packages
• Power supply: LPS: VDD 3.3V (± 5%), VDDQ 3.3V/2.5V (± 5%)
• JTAG Boundary Scan for BGA packages
• Commercial, Industrial and Automotive temperature support
• Lead-free available