S80KS2563GABHM020

S80KS2563GABHM020 is a HYPERRAM™ self-refresh dynamic RAM (DRAM) with Octal xSPI interface. It is a high-speed CMOS, self-refresh DRAM with xSPI (Octal) interface. The DRAM array uses dynamic cells that require periodic refresh. Refresh control logic within the device manages the refresh operations on the DRAM array when the memory is not being actively read or written by the xSPI interface host. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as though the memory uses static cells that retain data without refresh. Hence, the memory is more accurately described as pseudo-static RAM (PSRAM). Since the DRAM cells cannot be refreshed during a read or write transaction, there is a requirement that the host limit read or write burst transfers lengths to allow internal logic refresh operations when they are needed.

• 1.8V interface support, single ended clock (CK) - 11 bus signals
• Bidirectional read-write data strobe (RWDS), output during read transactions as read data strobe
• Output at the start of all transactions to indicate refresh latency
• Input during write transactions as write data mask
• 200MHz maximum clock rate
• Maximum access time (tACC) is 35ns
• 256Mb density
• VCC power supply range from 1.7 to 2V
• 24-ball FBGA package
• Automotive, AEC-Q100 grade 1 (-40°C to +125°C) temperature range