CY7C65213A-32LTXIT
18-Mbit (512K × 36/1M × 18) Pipelined SRAM with NoBL Architecture (With ECC)
- RoHS 10 Compliant
- Tariff Charges
CY7C65213A-32LTXIT is a USB-UART LP bridge controller. It provides a simple method to upgrade UART-based device to USB with a minimal number of components. It also includes UART transceiver, an internal regulator, an internal oscillator. The internal flash is used to store custom-specific USB descriptors and GPIO configuration. This is done in-system using a configuration utility that communicates over the USB interface. This USB-UART LP bridge controller is widely used in blood glucose meter, battery-operated devices, USB-to-UART cables, enables USB connectivity in legacy peripherals with UART, point-of-sale (POS) terminals industrial and T&M (test and measurement) devices etc.
- Supports communication driver class (CDC), personal healthcare device class (PHDC)
- Integrated USB termination resistors, charger detection
- Data rates upto 3Mbps, 256 bytes for each transmit and receive buffer
- Supports parity, overrun, and framing errors, RS-485 supported
- Supports UART break signal, general-purpose input/output (GPIO) is 8 pins
- 512-byte flash for storing configuration parameters
- Clocking integrated to 48MHz clock oscillator
- Operating voltage is 1.71V to 5.50V, 65USB hubs, CMOS technology code
- Operating temperature is -40°C to 85°C, no of GPIO is 8 pins
- Packaging style is 32pin QFN (5 × 5 × 1mm, 0.5mm pitch) (Pb-free)
Technical Attributes
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| Description | Value |
|---|
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | NO RECOVERY FEE |
| ECCN: | 3A991A3 |
| HTSN: | 8542310075 |
| Schedule B: | 8542310075 |