CY7C1470V33-167AXI
SRAM Chip Sync Quad 3.3V 72M-Bit 2M x 36 3.4ns 100-Pin TQFP Tray
The CY7C1470V33 is a 3.3 V, 2 M × 36/4 M × 18/1 M × 72 synchronous pipelined burst SRAMs with No Bus Latency (NoBL logic, respectively. They are designed to support unlimited true back-to-back read/write operations with no wait states. The CY7C1470V33 is equipped with the advanced (NoBL) logic required to enable consecutive read/write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data in systems that require frequent write/read transitions. The CY7C1470V33 is pin compatible and functionally equivalent to ZBT devices.
- 72Mbit (2M × 36/4M × 18/1M × 72) pipelined SRAM with NoBL™ architecture
- Pin compatible and functionally equivalent to ZBT
- Supports 167MHz bus operations with zero wait states
- Byte write capability
- Single 3.3 V power supply
- 3.3V/2.5V I/O power supply
- Fast clock-to-output time
- Clock enable pin to suspend operation
- Synchronous self timed writes
- IEEE 1149.1 JTAG boundary scan compatible
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 21 Bit | ||
| Pipelined | ||
| 167 MHz | ||
| SDR | ||
| 72 Mbit | ||
| TQFP | ||
| Surface Mount | ||
| Gold|Matte Tin | ||
| 260 | ||
| 167 MHz | ||
| 450 mA | ||
| 3.4 ns | ||
| 2M x 36bit | ||
| 72 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 100 | ||
| 36 Bit | ||
| 36 Bit | ||
| 4 | ||
| 2 MWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 100TQFP | ||
| 100 | ||
| 20 x 14 x 1.4 mm | ||
| No | ||
| Industrial | ||
| Pipelined SRAM | ||
| TQFP | ||
| 3.63 V | ||
| 3.135 V | ||
| 3.3 V | ||
| Synchronous | ||
| 3.3000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Factory Lead Time: