CY7C1062GE30-10BGXI

CY7C1062GE are high-performance CMOS fast static RAM devices with embedded ECC. Both have three chip enables, giving easy memory expansion features. The CY7C1062GE device includes an error indication pin that signals the host processor in the case of a single bit error-detection and correction event. To write to the device, take Chip Enables (CE1\, CE2\, and CE3\ LOW) and Write Enable (WE\) input LOW. If Byte Enable A (BA\) is LOW, then data from I/O pins (I/O0 through I/O7) is written into the location specified on the address pins (A0 through A18). If Byte Enable B (BB\) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A18). Likewise, BC and BD correspond with the I/O pins I/O16 to I/O23 and I/O24 to I/O31, respectively. To read from the device, take Chip Enables (CE1\, CE2\, and CE3\ LOW) and Output Enable (OE\) LOW while forcing the Write Enable (WE\) HIGH. If the first BA\ is LOW, then data from the memory location specified by the address pins appear on I/O0 to I/O7. If BB\ is LOW, then data from memory appears on I/O8 to I/O15. Likewise, BC and BD correspond to the third and fourth bytes.The input and output pins (I/O0 through I/O31) are placed in a high impedance state when the device is deselected (CE1\, CE2\, or CE3\ HIGH), the outputs are disabled (OE\ HIGH), the byte selects are disabled (BA\-D HIGH), or during a write operation (CE1\, CE2\ and CE3\ LOW and WE LOW). On CY7C1062GE device, the detection and correction of a single-bit error in the accessed location is indicated by the assertion of the ERR output (ERR = High). CY7C1062GE devices are available in Pb-free 119-ball plastic ball grid array (PBGA) package.

• High speed: tAA = 10 ns/15 ns
• Embedded error-correcting code (ECC) for single-bit errorcorrection
• Low active and standby current
  • Icc = 90 mA typical
  • Isb2 = 20 mA typical
• Operating voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V
• 1.0 V data retention
• Automatic power-down when deselected
• Transistor-transistor logic (TTL) compatible inputs and outputs
• ERR pin to indicate 1-bit error detection and correction
• Available in Pb-free 119-ball plastic ball grid array (PBGA)package