CY7C1041GN30-10BVJXIT

CY7C1041GN30-10BVJXIT is a high-performance CMOS fast static RAM organized as 256K words by 16-bits. Data writes are performed by asserting the Chip Enable (active low CE) and Write Enable (active low WE) inputs LOW while providing the data on I/O0 through I/O15 and address on A0 through A17 pins. The Byte High Enable (active low BHE) and Byte Low Enable (active low BLE) inputs control write operations to the upper and lower bytes of the specified memory location. BHE controls I/O8 through I/O15 and BLE controls I/O0 through I/O7. Data reads are performed by asserting the Chip Enable (active low CE) and Output Enable (active low OE) inputs LOW and providing the required address on the address lines. Read data is accessible on the I/O lines (I/O0 through I/O15). Byte accesses can be performed by asserting the required byte enable signal (active low BHE or active low BLE) to read either the upper byte or the lower byte of data from the specified address location.

• TTL-compatible inputs and outputs
• Vcc range from 1.65V to 2.2V, 2.2V to 3.6V, 4.5V to 5.5V
• Input capacitance is 10pF ( TA = 25°C, f = 1MHz, VCC = VCC(typ))
• I/O capacitance is 10pF ( TA = 25°C, f = 1MHz, VCC = VCC(typ))
• VCC for data retention is 1V minimum
• Data retention current is 8V max (VCC = 1.2V, CE > VCC – 0.2V, VIN > VCC – 0.2V, or VIN < 0.2V)
• Operation recovery time is 10ns minimum (VCC > 2.2V)
• Input leakage current range from -1 to +1µA (GND < VI < VCC)
• Output leakage current range from -1 to +1µA (GND < VOUT < VCC, Output disabled)
• 48-ball VFBGA package, industrial temperature range from -40°C to +85°C