CY7C1041GE30-10ZSXI
SRAM Chip Async Single 3V 4M-Bit 256K x 16 10ns 44-Pin TSOP-II Tray
CY7C1041GE30-10ZSXI is a high-performance CMOS fast static RAM device with embedded ECC. This offers in single chip-enable option and in multiple pin configurations. The CY7C1041GE device includes an ERR pin that signals an error-detection and correction event during a read cycle. Data writes are performed by asserting the chip enable active-low (CE) and write enable active-low (WE) inputs LOW, while providing the data on I/O0 through I/O15 and address on A0 through A17 pins. The byte high enable active-low (BHE) and byte low enable active-low (BLE) inputs control write operations to the upper and lower bytes of the specified memory location. Active-low BHE controls I/O8 through I/O15 and active-low BLE controls I/O0 through I/O7.
- High speed tAA = 10ns, 2.2V–3.6V voltage range, 4Mbit density
- 44-pin TSOP II, process technology = 65nm, data width: 1 = × 16-bits
- ERR output single bit error indication
- Active current: ICC = 38mA typical, standby current: ISB2 = 6mA typical
- 1.0-V data retention, TTL-compatible inputs and outputs
- Error indication (ERR) pin to indicate 1-bit error detection and correction
- Industrial operating temperature rating range from –40°C to +85°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| TSOP-II | ||
| Surface Mount | ||
| 256Kword x 16bit | ||
| 4 Mbit | ||
| 44 | ||
| 85 °C | ||
| -40 °C | ||
| Asynchronous SRAM | ||
| 2.2 V | ||
| 3.6 V | ||
| 3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.A |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |